1. Field of the Invention
The present invention relates to technologies by which to control memory access, and it particularly relates to a technology by which to control the memory access from a user process.
2. Description of the Related Art
Along with recent years' significant advance of computer graphics technology and image processing techniques, which are utilized in the fields of computer games, digital broadcasting, and the like, there is a demand that information processing apparatuses such as computers, gaming machines, and televisions be equipped with faster processing capacity in order to process high-definition image data. To meet such demand, it goes without saying that the arithmetic process itself needs to be done at high speed. By the same token, it is important to suitably distribute the tasks among a plurality of processing units.
Each processing unit accesses memory as appropriate when tasks are to be executed. In so doing, if the access by a processing unit B to a memory area secured for the processing of a processing unit A is granted, the performance stability will be impaired. Particularly in the case of an I/O device user for controlling peripheral equipment, there are many cases where a device driver directly designates a physical address so as to control the memory. Any error in programming such a device driver may impose a serious effect on the performance stability of an information processing apparatus.
Furthermore, taking into consideration a system design in which a user process requests a device driver to control the peripheral equipment, the processing efficiency of the device driver greatly influences the overall system processing efficiency.